using System;
namespace NvAPIWrapper.Native.GPU
{
///
/// GPU output IDs are identifiers for the GPU outputs that drive display devices. The GPU output might or might not be
/// connected to a display, or be active. Each output is identified by a bit setting within a 32-bit unsigned integer.
/// A GPU output mask consists of a 32-bit integer with several bits set, identifying more than one output from the
/// same physical GPU.
///
[Flags]
public enum OutputId : uint
{
///
/// Invalid output if
///
Invalid = 0,
///
/// Represents Output 1
///
Output1 = 1U,
///
/// Represents Output 2
///
Output2 = 1u << 1,
///
/// Represents Output 3
///
Output3 = 1u << 2,
///
/// Represents Output 4
///
Output4 = 1u << 3,
///
/// Represents Output 5
///
Output5 = 1u << 4,
///
/// Represents Output 6
///
Output6 = 1u << 5,
///
/// Represents Output 7
///
Output7 = 1u << 6,
///
/// Represents Output 8
///
Output8 = 1u << 7,
///
/// Represents Output 9
///
Output9 = 1u << 8,
///
/// Represents Output 10
///
Output10 = 1u << 9,
///
/// Represents Output 11
///
Output11 = 1u << 10,
///
/// Represents Output 12
///
Output12 = 1u << 11,
///
/// Represents Output 13
///
Output13 = 1u << 12,
///
/// Represents Output 14
///
Output14 = 1u << 13,
///
/// Represents Output 15
///
Output15 = 1u << 14,
///
/// Represents Output 16
///
Output16 = 1u << 15,
///
/// Represents Output 17
///
Output17 = 1u << 16,
///
/// Represents Output 18
///
Output18 = 1u << 17,
///
/// Represents Output 19
///
Output19 = 1u << 18,
///
/// Represents Output 20
///
Output20 = 1u << 19,
///
/// Represents Output 21
///
Output21 = 1u << 20,
///
/// Represents Output 22
///
Output22 = 1u << 21,
///
/// Represents Output 23
///
Output23 = 1u << 22,
///
/// Represents Output 24
///
Output24 = 1u << 23,
///
/// Represents Output 25
///
Output25 = 1u << 24,
///
/// Represents Output 26
///
Output26 = 1u << 25,
///
/// Represents Output 27
///
Output27 = 1u << 26,
///
/// Represents Output 28
///
Output28 = 1u << 27,
///
/// Represents Output 29
///
Output29 = 1u << 28,
///
/// Represents Output 30
///
Output30 = 1u << 29,
///
/// Represents Output 31
///
Output31 = 1u << 30,
///
/// Represents Output 32
///
Output32 = 1u << 31
}
}